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You searched for: mediatype:texts AND collection:theides AND subject:"Optimized CNFET-based Full Adder (OP-CNFET)."
[texts]Energy Efficient and Process Tolerant Full Adder in Technologies beyond CMOS - Aminul Islam, M. W. Akram, Mohd. Hasan
This paper presents 1-bit full adder cell in emerging technologies like FinFET and CNFET that operates in the moderate inversion region for energy efficiency, robustness and higher performance. The performance of the adder is improved by the optimum selection of important process parameters like oxide and fin thickness in FinFET and number of carbon nanotubes, chirality vector and pitch in CNFET. The optimized CNFET-based full adder (OP-CNFET) has higher speed, lower PDP (power-delay product) an...
Keywords: Variability; power-delay product (PDP); moderate inversion region (MIR); optimized FinFET-based full adder (OP-FinFET); optimized CNFET-based full adder (OP-CNFET)
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